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MT9D115W00STCK25AC1-750(2015) Datasheet PDF - ON Semiconductor

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ON Semiconductor ONSEMI
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Architecture Overview
The MT9D115 combines a 2 Mp sensor core with an IFP to form a stand-alone solution for both image acquisition and processing. Both the sensor core and the IFP have internal registers that can be controlled by the user. In normal operation, an integrated microcontroller autonomously controls most aspects of operation. The processed image data is transmitted to the host system either through the parallel or MIPI interface.
Figure 1 shows the major functional blocks of the MT9D115.

• 2 Mp resolution (1600H x 1200V)
• 1/5-inch optical format
• Same or better image quality compared to MT9D112
• Individual module ID support through one-time
   programmable (OTP) memory
• Surface fit lens correction (LC) to compensate for
   lens/small pixel vignetting and corner color variations
• Automatic functions: Exposure, white balance, black
   level offset correction, flicker detection and
   avoidance, color saturation control, defect
   identification and correction, aperture correction,
   and GPIO
• Programmable controls: Exposure, white balance,
   horizontal and vertical blanking, color, sharpness,
   gamma, lens shading correction, horizontal and
   vertical image flip, zoom, windowing, sampling rates,
   and GPIO
• 15 frames per second (fps) at 1600H x 1200V with
   moderate pixel clock frequency ( 64 MHz) to
   minimize baseband reception interference and 30 fps
   at 800H x 600V
• 2 x 2 pixel binning to improve low-light image quality
• Support for external LED or xenon flash
• On-chip phase-locked loop (PLL) to minimize the
   number of system clocks
• Low power modes to prolong battery life of portable
• Fail-safe I/Os with programmable output slew rate
• Industry standard two-wire serial interface for
• 10-bit parallel or MIPI serial interfaces for image data

• Cellular phones
• PC cameras
• PDAs


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