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MUPA64K16 Datasheet PDF - Music Semiconductors

Part Name
Description
MFG CO.
MUPA64K16
Music-Semiconductors
Music Semiconductors Music-Semiconductors
Other PDF
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PDF
MUPA64K16 Datasheet PDF : PDF DOWNLOAD     
MUPA64K16-15TJC image

General Description
The MUPA64K16 Alto Priority Queue Scheduler is a high-performance sorting engine designed to support packet scheduling in high-speed switch or router applications. Alto can support any scheduling algorithm for which a priority queue is required, such as Weighted Fair Queuing, Start-Time Fair Queuing and Self-Clocked Fair Queuing.

Features
• Priority Queue with insert, extract and peek operations
• Packet processing time of 150 ns
• 65,536 priority queue entries
• 32-bit sorting key
• 16-bit associated data value
• Supports up to 65,536 FIFO queues
• Supports up to 16 physical switch ports
• Wrap register per port handles counter rollover
• UID Manager generates unique associated data values
• 32-bit synchronous data interface
• 17-bit SRAM address bus
• 15 ns clock
• 1.8V core / 3.3V I/O
• 128-pin LQFP package (14 x 20 mm)
• Industrial Temperature grade available
• IEEE 1149.1 JTAG boundary scan logic

 

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